Staff Packaging Engineer
Irvine, CA 92618
The Staff Packaging Engineer will lead the design and implementation of packaging technology for Company's advanced tunable RF MEMS products. Key packaging technology areas include, but are not limited to, fcLGA, WLFO, ECP, WLCSP, MCM, SIP, 2.5/3D.
The Packaging technology isco-designed with the monolithic MEMS-CMOS to provide high performance RF product applications including high performance antenna tuners, dynamic impedance matching networks, broadband programmable filters, phase shifters, Front Ends, and others.
The ideal candidate will be responsible for design and implementation of the existing package technology and for identification and evaluation of future package technology. These efforts will include driving internal package technology evaluation activities that include modeling, implementation, and evaluation of performance and reliability and contributing to specific product development activities.
The Staff Packaging Engineer will work closely with other members the Operations team to support a secure and effective supply chain and to lead the evaluation of new packaging technologies. In addition, the Staff Packaging Engineer will work with engineers from analog/digital CMOS Design, RF Development, MEMS engineering, and Quality and Reliability Teams on the delivery of new products. In this position, opportunities will be provided to shape the future package technology development activities and implementation in products.
Support management of the packaging supply chain by working with the Director of Operations on production packaging activities and participating in the periodic meetings with OSATs as the packaging technologist
Collaborate with the RFIC Engineering, MEMS Engineering, RF Products Engineering, Applications Engineering, and Q&R on the implementation, characterization, and qualification of the various packaging technologies for various products.
Develop the Packaging Technology Road Map to intersect with the Tunable RF MEMS Product Road Map.
Lead Packaging Technology evaluations in support of the Packaging Technology Road Map and Product Roadmap.
Lead/Perform package design, simulation/modeling of the hygro/thermo/mechanical behavior of the product package. Support or lead package co-design with the MEM, CMOS, and RF, where these respective groups will support or lead in various cases.
mechanical shock behavior. This will include the application of optical imaging techniques
such as Moiré, white light interferometry, speckle interferometry and other techniques.
Work with MEMS engineering to characterize the impact of 1st level packaging on the
wafer level encapsulation
Lead packaging materials characterization for application to packaging design efforts. This
will include the application of nano-indentation, DMA, TMA, and other techniques for the
characterization of packaging materials propertied used in design.
Expertise in broad spectrum of packaging technologies including, but not limited to,
fcLGA, WLCSP, WLFO, WLFI, open cavity packaging, ECP, MCM, SIP, 2.5/3D and
others. Knowledge of the manufacturing and assembly techniques used in the various
Expertise with material characterization techniques for packaging materials, including
nano-indentation, DMA, TMA, and others.
Expertise with the design, modeling, and simulation of different packaging technologies,
including an understanding of the material properties required for simulation
Knowledge or proficiency with packaging design/simulation tools such as Ansys, Simulia,
Comsol, Coventorware, AutoCad, SolidWorks, MoldFlow, etc.
Knowledge of statistical analysis, SPC, and statistics of failure, including Weibull and other
distributions, where they may be applied to shock or temperature cycling failures.
Knowledge of statistical analysis tools such as Excel, JMP, or SAS.
Knowledge of packaging characterization techniques such as Moiré, white light
interferometry, speckle interferometry, and other techniques.
Knowledge of MEMS and CMOS technology
Strong written and oral communication skills. Ability to communicate complex information
between our development team and our foundry partners.
Bachelors of Science in Electrical, Mechanical or Materials Engineering or Applied
Physics. MS preferred;
10+ years in MEMS technology & product development with increasing responsibility and
Experience in packaging technology for high frequency (RF, mmWave) electronics or
MEMS is a plus.