Sr. Design Engineer

Albuquerque, NM 87123

Posted: 06/11/2019 Employment Type: Contract Industry: Engineering Job Number: 80225
This Senior Design Engineer position will be responsible for working with other FPGA engineers in a team environment developing and verifying FPGA designs for closed control-loop motion control applications with motor commutation in the space launch systems market segment.
  • BSEE and 20 years or MSEE and 15 years of FPGA or ASIC design and verification experience.
  • Experience with FPGA/ ASIC VHDL design. Experience with other design or verification languages is a plus.
  • Experience with VHDL based self-checking FPGA/ASIC test benches
  • Experience with code coverage metric generation and back-annotated (post place and route) simulation.
  • Experience with FPGA constraint generation and timing closure.
  • Knowledge of design for a space radiation environment tolerant hardware and human-rated reliability design processes.
  • Experience with FPGA/ASIC designs for control loops.
  • Experience with fix point integer math (i.e., addition and multiplication of fractional 2’s complement values).
  • Experience implementing digital filters in FPGAs.
  • Experience interfacing FPGAs/ASICs to ADCs, DACs, LVDTs, resolvers, temperature sensors, and common standard communication busses (MIL-STD-1553, RS-422, Ethernet).
  • Experience with Microsemi, Modelsim, and Synplify design tools. Experience with other vendor tools is a plus.
  • Experience with configuration control, change management, problem reporting and tracking, and requirement management tools and processes.
  • Experience generating formal design documentation and generating and delivering formal presentations to a customer.
  • Experience working with customer specifications and parsing requirements to the FPGA/ASIC design.
  • Experience performing formal verification of the design to each customer requirement “shall”.
  • Experience integrating FPGAs/ASICs with the circuit card level and box-level designs in a laboratory environment.
  • Experience with qualification testing over military and/or space environments.
  • Experience with basic scripting language use for FPGA tool execution automation. Experience with other programming languages is a plus.
  • Experience with schedule tools and cost account management duties is a plus.
  • Experience designing for motion control and motor control applications is a plus.
  • Experience with FPGA/ASIC design lifecycle phases/processes and coding standards is a plus.
For more information contact Mark Johnston at 714-901-3804 or
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