Custom IC Layout Designer

Irvine, CA 92618

Posted: 04/01/2020 Employment Type: Direct Industry: Engineering Job Number: 80506

Job Description

Summary:

Our client develops monolithic, digitally-controlled capacitor-arrays for high performance antenna tuners, dynamic impedance matching networks, broadband programmable filters, phase shifters for several communication applications, and other RF tuning applications. The capacitors are built using proprietary MEMS technology combined into a CMOS or SOI process flow. The successful candidate will create the layouts for these ICs, including the MEMS elements, and will work with circuit designers and MEMS designers.

Responsibilities and Duties:

- Creating custom IC layouts from block-level to top-level using Cadence Virtuoso
- Creating new MEMS layouts and test structures for MEMS process development
- Working with multiple PDKs in CMOS and SOI processes
- Incorporating IP blocks and verifying the complete chip
- Providing input to the floorplan with the lead designer
- Successful verification
- Follow established tapeout and archiving procedures and help improve those procedures
- Presenting verification results and waivers at internal Layout Reviews
- Presenting verification results and waivers to Foundries at tapeout

Job Requirements

Required Experience and Knowledge:
- 10 years of mixed-signal & RF layout/high speed analog layout experience
- Good process knowledge of 130nm CMOS and SOI
- Power routing & ESD protection schemes
- Wire bonding, flip-chip pads and WLCSP
- DFM
- Device matching
- Minimizing layout parastics
- Maximizing Isolation
- Debugging LVS errors using PVS/Assura

Desired Experience:
- MEMS layout
- High voltage CMOS/SOI
- Parasitic extraction

Required Attributes:
- Independent worker
- Good organization and attention to detail
- Motivation to complete projects under tapeout pressure
- Good interpersonal skills and communications
- Team player
- Problem solving of verification issues
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